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? semiconductor components industries, llc, 2011 may, 2011 ? rev. 0 1 publication order number: ncp4686/d ncp4686 400 ma, high accuracy, low input voltage, low dropout regulator the ncp4686 is cmos linear voltage regulators with 400 ma output current capability. the device has very high output voltage accuracy, low supply current and low on ? resistance transistor. the ncp4686 is easy to use and includes output current fold ? back protection and a fully integrated constant slope circuit as a soft ? start circuit. due to it inrush current is minimized and no output voltage overshoots are there. a chip enable function is included to save power by lowering supply current. features ? operating input voltage range: 1.0 v to 3.6 v ? output voltage range: 0.7 v to 1.8 v (available in 0.1 v steps) ? output voltage accuracy: 0.8% (v out 1.0 v, t a = 25 c) ? supply current: 48 a ? dropout voltage: 0.22 v (v out = 1.5 v) ? line regulation: 0.1%/v typ. ? ripple rejection: typ. 60 db (f = 10 khz) ? stable with ceramic capacitors: 1 f or more ? current fold back protection ? build ? in constant slope circuit ? available in xdfn6 1.2 x 1.2 mm, sc ? 70, sot23 packages ? these are pb ? free devices typical applications ? battery ? powered equipment ? networking and communication equipment ? cameras, dvrs, stb and camcorders ? home appliances figure 1. typical application schematics vin vout ce gnd vin vout ncp4686x c1 1 c2 1 http://onsemi.com see detailed ordering and shipping information in the package dimensions section on p age 14 of this data sheet. ordering information sc ? 70 case 419a xx, xxx, xxxx = specific device code m, mm = date code a = assembly location y = year w = work week = pb ? free package marking diagrams (*note: microdot may be in either location) xxx xmm sot ? 23 ? 5 case 1212 xxx m xdfn6 case 711aa xx mm
ncp4686 http://onsemi.com 2 current limit vref vin gnd ce vout ncp4686hxxxx current limit vref vout vin gnd ce ncp4686dxxxx figure 2. simplified schematic block diagram pin function description pin no. xdfn6 pin no. sc ? 70 pin no. sot23 pin name description 6 4 5 v out output pin 2 3 2 gnd ground 3 1 3 ce chip enable pin (active ?h?) 4 5 1 v in input pin 1 2 4 nc no connection 5 ? ? nc no connection *please refer to package dimensions section on page 15 on this data sheet for pin numbers associated with different package. absolute maximum ratings rating symbol value unit input voltage (note 1) v in 4.0 v output voltage v out ? 0.3 to v in + 0.3 v chip enable input v ce ? 0.3 to 4.0 v output current i out 500 ma power dissipation xdfn1212 p d 400 mw power dissipation sc ? 70 380 power dissipation sot23 420 junction temperature t j ? 40 to 150 c storage temperature t stg ? 55 to 125 c operating ambient temperature range t a ? 40 to +85 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristis and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) latchup current maximum rating tested per jedec standard: jesd78.
ncp4686 http://onsemi.com 3 thermal characteristics rating symbol value unit thermal characteristics, xdfn6 1.2 x 1.2 mm thermal resistance, junction ? to ? air r ja 250 c/w thermal characteristics, sot23 thermal resistance, junction ? to ? air r ja 238 c/w thermal characteristics, sc ? 70 thermal resistance, junction ? to ? air r ja 263 c/w electrical characteristics ? 40 c t a 85 c; v in = v out(nom) + 1 v, whichever is greater; i out = 1 ma, c in = c out = 0.1 f, unless otherwise noted. typical values are at t a = +25 c. parameter test conditions symbol min typ max unit operating input voltage v in 1.0 3.6 v output voltage t a = +25 c v out 1.0 v v out x0.992 x1.008 v v out < 1.0 v ? 8 8 mv ? 40 c t a 85 c v out 1.0 v x0.983 x1.017 v v out < 1.0 v ? 17 17 mv output voltage temp. coefficient ? 40 c t a 85 c v out / t a 60 ppm/ c line regulation v out(nom) + 0.5 v v in 3.6 v, v in 1.3 v line reg 0.10 0.25 %/v load regulation i out = 1 ma to 400 ma load reg 25 45 mv dropout voltage i out = 400 ma 0.7 v v out < 0.8 v v do 0.48 0.62 v 0.8 v v out < 0.9 v 0.40 0.54 0.9 v v out < 1.0 v 0.36 0.47 1.0 v v out < 1.2 v 0.32 0.45 1.2 v v out < 1.5 v 0.28 0.38 1.5 v v out 0.22 0.31 output current i out 400 ma short current limit v out = 0 v i sc 110 ma quiescent current i q 48 75 a standby current v ce = 0 v, t a = 25 c i stb 0.1 8.0 a ce pin threshold voltage ce input voltage ?h? v ceh 0.9 v ce input voltage ?l? v cel 0.4 power supply rejection ratio v in = v out + 1.0 v, v in = 0.2 v pk ? pk , i out = 30 ma, f = 10 khz psrr 60 db output noise voltage f = 10 hz to 100 khz, v out = 0.7 v, i out = 30 ma v n 30 v rms low output n ? channel tr. on resistance v in = 2 v, v ce = 0 v, ncp4686d only r low 43
ncp4686 http://onsemi.com 4 typical characteristics 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 100 200 300 400 500 600 700 800 i out (ma) v out (v) v in = 1.1 v 2.8 v 3.6 v 1.8 v figure 3. output voltage vs. output current 0.8 v version (t j = 25 c) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 100 200 300 400 500 600 700 800 i out (ma) v out (v) figure 4. output voltage vs. output current 1.2 v version (t j = 25 c) v out (v) v in = 1.5 v 2.8 v 2.2 v 3.6 v 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 100 200 300 400 500 600 700 800 i out (ma) figure 5. output voltage vs. output current 1.8 v version (t j = 25 c) v out (v) v in = 2.1 v 2.8 v 3.6 v 0 0.10 0.20 0.30 0.40 0.50 0 50 100 150 200 250 300 350 400 i out (ma) v do (v) figure 6. dropout voltage vs. output current 0.8 v version t j = 85 c 25 c ? 40 c 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0 50 100 150 200 250 300 350 400 i out (ma) v do (v) figure 7. dropout voltage vs. output current 1.2 v version t j = 85 c 25 c ? 40 c 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0 50 100 150 200 250 300 350 400 t j = 85 c 25 c ? 40 c v do (v) i out (ma) figure 8. dropout voltage vs. output current 1.8 v version
ncp4686 http://onsemi.com 5 typical characteristics 0.75 0.76 0.77 0.78 0.79 0.80 0.81 0.82 0.83 0.84 0.85 ? 40 ? 20 0 20 40 60 80 t j , junction temperature ( c) v out (v) figure 9. output voltage vs. temperature, 0.8 v version v in = 1.8 v 1.15 1.16 1.17 1.18 1.19 1.20 1.21 1.22 1.23 1.24 1.25 ? 40 ? 200 20406080 t j , junction temperature ( c) figure 10. output voltage vs. temperature, 1.2 v version v in = 2.2 v v out (v) 1.75 1.76 1.77 1.78 1.79 1.80 1.81 1.82 1.83 1.84 1.85 t j , junction temperature ( c) v out (v) figure 11. output voltage vs. temperature, 2.8 v version v in = 2.8 v ? 40 ? 20 0 20 40 60 80 0 10 20 30 40 50 60 0 0.6 1.2 1.8 2.4 3 3.6 i gnd ( a) v in , input voltage (v) figure 12. supply current vs. input voltage, 0.8 v version 0 10 20 30 40 50 60 0 0.6 1.2 1.8 2.4 3 3.6 i gnd ( a) v in , input voltage (v) figure 13. supply current vs. input voltage, 1.2 v version 0 10 20 30 40 50 60 70 80 90 100 0 0.6 1.2 1.8 2.4 3 3.6 i gnd ( a) v in , input voltage (v) figure 14. supply current vs. input voltage, 1.8 v version
ncp4686 http://onsemi.com 6 typical characteristics 0 10 20 30 40 50 60 ? 40 ? 200 20406080 t j , junction temperature ( c) i gnd ( a) figure 15. supply current vs. temperature, 0.8 v version 0 10 20 30 40 50 60 ? 40 ? 200 20406080 t j , junction temperature ( c) i gnd ( a) figure 16. supply current vs. temperature, 1.2 v version 0 10 20 30 40 50 60 ? 40 ? 200 20406080 t j , junction temperature ( c) i gnd ( a) figure 17. supply current vs. temperature, 1.8 v version 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 0.6 1.2 1.8 2.4 3 3.6 v in , input voltage (v) figure 18. output voltage vs. input voltage, 0.8 v version v out (v) i out = 50 ma 30 ma 1 ma 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 0.6 1.2 1.8 2.4 3 3.6 v in , input voltage (v) figure 19. output voltage vs. input voltage, 1.2 v version v out (v) i out = 50 ma 30 ma 1 ma 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 0.6 1.2 1.8 2.4 3 3.6 v in , input voltage (v) figure 20. output voltage vs. input voltage, 1.8 v version v out (v) i out = 50 ma 30 ma 1 ma
ncp4686 http://onsemi.com 7 typical characteristics 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 figure 21. psrr, 0.8 v version, v in = 1.8 v psrr (db) frequency (khz) i out = 1 ma 30 ma 150 ma 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 figure 22. psrr, 1.2 v version, v in = 2.2 v frequency (khz) psrr (db) i out = 1 ma 30 ma 150 ma 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 figure 23. psrr, 1.8 v version, v in = 2.8 v psrr (db) frequency (khz) i out = 1 ma 30 ma 150 ma figure 24. output voltage noise, 0.8 v version, v in = 1.8 v, i out = 30 ma 0 0.2 0.4 0.6 0.8 1.0 1.2 0.01 0.1 1 10 100 1000 v n ( v rms / hz ) frequency (khz) figure 25. output voltage noise, 1.2 v version, v in = 2.2 v, i out = 30 ma 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.01 0.1 1 10 100 1000 v n ( v rms / hz ) frequency (khz) figure 26. output voltage noise, 1.8 v version, v in = 2.8 v, i out = 30 ma 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0.01 0.1 1 10 100 1000 frequency (khz) v n ( v rms / hz )
ncp4686 http://onsemi.com 8 typical characteristics figure 27. line transients, 0.8 v version, t r = t f = 5 s, i out = 30 ma 0.785 0.790 0.795 0.800 0.805 0.810 0.815 1.8 2.3 2.8 3.3 0 40 80 120 160 200 240 280 320 360 400 v out (v) t ( s) v in (v) figure 28. line transients, 1.2 v version, t r = t f = 5 s, i out = 30 ma 1.185 1.190 1.195 1.200 1.205 1.210 1.215 0 40 80 120 160 200 240 280 320 360 400 2.2 2.7 3.2 3.7 v out (v) v in (v) t ( s) figure 29. line transients, 1.8 v version, t r = t f = 5 s, i out = 30 ma 1.785 1.790 1.795 1.800 1.805 1.810 1.815 0 40 80 120 160 200 240 280 320 360 400 2.8 3.3 3.8 4.3 v out (v) v in (v) t ( s)
ncp4686 http://onsemi.com 9 typical characteristics figure 30. load transients, 0.8 v version, i out = 50 ? 100 ma, t r = t f = 0.5 s, v in = 1.8 v 0.77 0.78 0.79 0.80 0.81 0.82 0 40 80 120 160 200 240 280 320 360 400 0 50 100 150 v out (v) t ( s) i out (ma) figure 31. load transients, 1.2 v version, i out = 50 ? 100 ma, t r = t f = 0.5 s, v in = 2.2 v 1.14 1.16 1.18 1.20 1.22 1.24 0 40 80 120 160 200 240 280 320 360 400 0 50 100 150 v out (v) t ( s) i out (ma) figure 32. load transients, 1.8 v version, i out = 50 ? 100 ma, t r = t f = 0.5 s, v in = 2.8 v 1.74 1.76 1.78 1.80 1.82 1.84 0 40 80 120 160 200 240 280 320 360 400 0 50 100 150 v out (v) t ( s) i out (ma)
ncp4686 http://onsemi.com 10 typical characteristics figure 33. load transients, 0.8 v version, i out = 1 ? 400 ma, t r = t f = 0.5 s, v in = 1.8 v 0.65 0.70 0.75 0.80 0.85 0.90 0 40 80 120 160 200 240 280 320 360 400 0 200 400 600 v out (v) t ( s) i out (ma) figure 34. load transients, 1.8 v version, i out = 1 ? 400 ma, t r = t f = 0.5 s, v in = 2.8 v 1.65 1.70 1.75 1.80 1.85 1.90 0 40 80 120 160 200 240 280 320 360 400 0 200 400 600 v out (v) t ( s) i out (ma) figure 35. load transients, 1.2 v version, i out = 1 ? 400 ma, t r = t f = 0.5 s, v in = 2.2 v 1.05 1.10 1.15 1.20 1.25 1.30 0 40 80 120 160 200 240 280 320 360 400 0 200 400 600 v out (v) t ( s) i out (ma)
ncp4686 http://onsemi.com 11 typical characteristics figure 36. load transients, 0.8 v version, i out = 1 ? 30 ma, t r = t f = 0.5 s, v in = 1.8 v 0.74 0.76 0.78 0.80 0.82 0.84 0 40 80 120 160 200 240 280 320 360 400 0 15 30 45 v out (v) t ( s) i out (ma) figure 37. load transients, 1.2 v version, i out = 1 ? 30 ma, t r = t f = 0.5 s, v in = 2.2 v 1.14 1.16 1.18 1.20 1.22 1.24 0 40 80 120 160 200 240 280 320 360 400 0 15 30 45 v out (v) t ( s) i out (ma) figure 38. load transients, 1.8 v version, i out = 1 ? 30 ma, t r = t f = 0.5 s, v in = 2.8 v 1.74 1.76 1.78 1.80 1.82 1.84 0 40 80 120 160 200 240 280 320 360 400 0 15 30 45 v out (v) t ( s) i out (ma)
ncp4686 http://onsemi.com 12 typical characteristics ? 0.2 0 0.2 0.4 0.6 0.8 0 20 40 60 80 100 120 140 160 180 200 0 0.9 1.8 2.7 figure 39. start ? up, 0.8 v version, v in = 1.8 v v out (v) v ce (v) t ( s) chip enable i out = 400 ma i out = 30 ma i out = 1 ma figure 40. start ? up, 1.2 v version, v in = 2.2 v ? 0.5 0 0.5 1.0 1.5 2.0 0 20 40 60 80 100 120 140 160 180 200 0 1.1 2.2 3.3 v out (v) v ce (v) t ( s) chip enable i out = 400 ma i out = 30 ma i out = 1 ma figure 41. start ? up, 1.8 v version, v in = 2.8 v ? 0.5 0 0.5 1.0 1.5 2.0 0 20 40 60 80 100 120 140 160 180 200 0 1.1 2.2 3.3 v out (v) v ce (v) t ( s) i out = 400 ma i out = 30 ma i out = 1 ma chip enable
ncp4686 http://onsemi.com 13 typical characteristics figure 42. shutdown, 0.8 v version, v in = 1.8 v ? 0.2 0 0.2 0.4 0.6 0.8 0 40 80 120 160 200 240 280 320 360 400 0 0.9 1.8 2.7 v out (v) v ce (v) t ( s) i out = 400 ma i out = 30 ma i out = 1 ma chip enable figure 43. shutdown, 1.2 v version, v in = 2.2 v ? 0.5 0 0.5 1.0 1.5 2.0 0 1.1 2.2 3.3 0 40 80 120 160 200 240 280 320 360 400 v out (v) v ce (v) t ( s) i out = 400 ma i out = 30 ma i out = 1 ma chip enable figure 44. shutdown, 1.8 v version, v in = 2.8 v ? 0.5 0 0.5 1.0 1.5 2.0 0 40 80 120 160 200 240 280 320 360 400 0 1.1 2.2 3.3 v out (v) v ce (v) t ( s) i out = 400 ma i out = 30 ma i out = 1 ma chip enable
ncp4686 http://onsemi.com 14 application information a typical application circuits for ncp4686 series is shown in figure 45. figure 45. typical application schematics vin vout ce gnd vin vout ncp4686x c1 1 c2 1 input decoupling capacitor (c1) a 1 f ceramic input decoupling capacitor should be connected as close as possible to the input and ground pin of the ncp4686. higher values and lower esr improves line transient response. output decoupling capacitor (c2) a 1 f ceramic output decoupling capacitor is enough to achieve stable operation of the ic. if a tantalum capacitor is used, and its esr is high, loop oscillation may result. the capacitors should be connected as close as possible to the output and ground pins. larger values and lower esr improves dynamic parameters. enable operation the enable pin ce may be used for turning the regulator on and off. the ic is switched on when a high level voltage is applied to the ce pin. the enable pin has an internal pull down current source. if the enable function is not needed connect ce pin to vin. constant slope circuit the constant slope circuit is used as a soft start circuit that allows the output voltage to start up slowly with a defined slope. this circuit minimizes inrush current at start up and also prevents overshoot of the output voltage at start up. the constant slope circuit is fully built in and no external component is needed. since the start up time and output voltage slope is defined internally , there is no way to change it. starting up into bigger output capacitors doesn?t cause problems due to the combination of the constant slope and current limit circuits. current limit this regulator includes fold ? back type current limit circuit. this type of protection doesn?t limit current up to current capability in normal operation, but when over current occurs, the output voltage and current decrease until the over current condition ends. typical characteristics of this protection type can be observed in the output voltage versus output current graphs shown in the typical characteristics chapter of this datasheet. output discharger the ncp4686d version includes a transistor between vout and gnd that is used for faster discharging of the output capacitor. this function is activated when the ic goes into disable mode. thermal as power across the ic increase, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and also the ambient temperature affect the rate of temperature increase for the part. when the device has good thermal conductivity through t he pcb the junction temperature will be relatively low in high power dissipation applications. pcb layout make the vin and gnd line as large as practical. if their impedance is high, noise pickup or unstable operation may result. connect capacitors c1 and c2 as close as possible to the ic, and make wiring as short as possible. ordering information device nominal output voltage description marking package shipping ? ncp4686dsn08t1g 0.8 v auto discharge cab sot23 ? 5 (pb ? free) 3000 / tape & reel NCP4686DSN10T1G 1.0 v auto discharge cad sot23 ? 5 (pb ? free) 3000 / tape & reel ncp4686dsn12t1g 1.2 v auto discharge caf sot23 ? 5 (pb ? free) 3000 / tape & reel ncp4686dsn18t1g 1.8 v auto discharge cam sot23 ? 5 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *to order other package and voltage variants, please contact your on semiconductor sales representative.
ncp4686 http://onsemi.com 15 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 419a ? 01 obsolete. new standard 419a ? 02. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. dim a min max min max millimeters 1.80 2.20 0.071 0.087 inches b 1.15 1.35 0.045 0.053 c 0.80 1.10 0.031 0.043 d 0.10 0.30 0.004 0.012 g 0.65 bsc 0.026 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 0.10 0.30 0.004 0.012 n 0.20 ref 0.008 ref s 2.00 2.20 0.079 0.087 b 0.2 (0.008) mm 12 3 4 5 a g s d 5 pl h c n j k ? b ? sc ? 88a (sc ? 70 ? 5/sot ? 353) case 419a ? 02 issue k
ncp4686 http://onsemi.com 16 package dimensions sot ? 23 5 ? lead case 1212 ? 01 issue a dim min max millimeters a1 0.00 0.10 a2 1.00 1.30 b 0.30 0.50 c 0.10 0.25 d 2.70 3.10 e 2.50 3.10 e1 1.50 1.80 e 0.95 bsc l l1 0.45 0.75 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimensions: millimeters. 3. datum c is the seating plane. a 1 5 23 4 d e1 b l1 e e c m 0.10 c s b s a b 5x a2 a1 s 0.05 c l 0.20 --- *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.95 dimensions: millimeters pitch 5x 3.30 0.56 5x 0.85 a --- 1.45 recommended a
ncp4686 http://onsemi.com 17 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.25mm from terminal tips. 4. coplanarity applies to all of the terminals. a seating plane d e 0.05 c a a1 2x 2x 0.05 c xdfn6 1.2x1.2, 0.4p case 711aa ? 01 issue o dim a min max millimeters --- 0.40 a1 0.00 0.05 b 0.13 0.23 d e e l pin one reference 0.05 c 0.05 c note 3 l e b 3 6 6x 1 4 mounting footprint* 1.20 bsc 1.20 bsc 0.40 bsc 0.37 0.48 bottom view c dimensions: millimeters 0.66 6x 0.22 6x 1.50 0.40 pitch *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. c 0.20 0.30 top view b side view note 4 recommended c 6x a m 0.05 b c package outline on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncp4686/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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